The present invention relates generally to logic devices and more specifically, to magnetic tunnel junction transistor (MTJT) devices.
A single MTJ device includes a pinned layer, a tunnel barrier layer and a free layer. The magnetization of the pinned layer is fixed in a direction and the resistance of the device depends on the relative orientation of the magnetizations of the free layer and the pinned layers. Recent developments include the use of magnesium oxide (MgO) based magnetic tunnel junction layers. In contrast to a single MTJ element, a double MTJ device includes two tunnel barrier layers and at least two magnetic layers including a thin middle free magnetic layer and at least one outer magnetic layer. The double MTJ device resistance depends on the relative orientation of the magnetization of the middle layer with respect to one or both of the outer layers.
The performance of complementary metal oxide semiconductor (CMOS) devices is currently limited by power dissipation. Reduction of the operating power within a CMOS device is also very limited. Thus, voltage control of magnetism is currently being researched for application to memory and logic devices in an attempt to reduce the operating power necessary.